MTAAP 2010
Workshop on Multithreaded Architectures and
Applications
http://ft.ornl.gov/events/mtaap10/
4/20/2010 - New agenda posted to accommodate
Eyjafjallajokull travel disruption.
Theme
Multithreading (MT) programming and execution
models are starting to permeate the high-end and mainstream computing scene.
This trend is driven by the need to increase processor utilization and deal
with the memory-processor speed gap. Recent and upcoming examples architectures
that fit this profile are Cray's XMT, IBM Cyclops, and several SMT processors
from Sun (Victoria Falls), IBM (Power6, Power7), or Intel, as well as
heterogeneous systems with accelerators such as GPGPUs from ATI, NVIDIA, and
Intel. The underlying rationale to increase processor utilization is a varying
mix of new metrics that take performance improvements as well as better power
and cost budgeting into account. Yet, it remains a challenge to identify and
productively program applications for these architectures with a resulting
substantial performance improvement.
The MTAAP 2010 workshop is a full-day meeting
to be held at the IPDPS 2010 focusing on Multithreading architectures and
applications. This workshop intends to identify applications that are amenable
to MT and the MT programming and execution models as well as the underlying
architectures on which they can thrive. The workshop seeks to explore
programming frameworks in the form of languages and libraries, compilers,
analysis and debugging tools to increase the programming productivity. The
topics of interest, of both theoretical and practical significance, include but
are not limited to:
-
Multithreaded Architectures
-
Multithreaded Programming Framework
-
Compilation and Optimization for MT
architectures
-
Multithreaded Performance Analysis and
Debugging Tools
-
Multithreaded Performance Metrics and
Evaluations
-
Multithreaded Libraries and run-time systems
-
Innovative applications for MT architectures
The MTAAP
workshop proceedings will be published along with the IPDPS proceedings.
Workshop Presentations
Workshop presentations are available at http://ft.ornl.gov/events/mtaap10/presentations/.
Workshop Agenda for Friday, April 23
4/20/2010 - SCHEDULE ALERT: The difficulties of traveling from
Europe caused by the Eyjafjallajokull eruption have forced us to rearrange the
agenda. Please review the new agenda below, and alert the workshop chairs to
any travel problems or issues with your new time slot.
08:00 - 08:15 : MTAAP 2010 Welcome
08:15 - 10:15 : Systems,
Tools, and Applications I
- On the Parallelisation of of MCMC by Speculative Chain
Execution: Jonathan M R Byrd (University of Warwick, United Kingdom);
Stephen Jarvis (University of Warwick, United Kingdom)
- User Level DB: a Debugging API for User-Level Thread
Libraries: Kevin Pouget (CEA/DAM Ile de France, France); Marc Perache
(CEA/DAM Ile de France, France); Patrick Carribault (CEA/DAM Ile de
France, France); Herve Jourdren (CEA/DAM Ile de France, France)
- A Multi-Threaded Approach for Data-Flow Analysis:
Marcus Edvinsson (Vaxjo University, Sweden); Welf Lowe (Vaxjo University,
Sweden)
- Scheduling complex streaming applications on the Cell
processor: Matthieu Gallet (Ecole normale superieure de Lyon, France);
Mathias Jacquelin (ENS Lyon, France); Loris Marchal (CNRS, France)
10:15 - 10:45 : Break I
10:45 - 11:45 : Keynote
- The POWER7 Processor
- Dr. Ram Rajamony, IBM Austin Research Laboratory
- Abstract: IBM recently announced the POWER7 systems
that featuring an innovative multi-core, 45 nanometer design, running at
speeds of over 4.1 GHz, with up to 8-cores per socket, and four threads
per core. These processors are organized into a range of systems that
handle workloads ranging from transactional to high-performance computing
workloads. This talk will describe the architecture of the POWER7
processor and systems, with special emphasis on the multi-core and
multi-threading aspects.
11:45 - 13:00 : Lunch
13:00 - 15:00 : Systems,
Tools, and Applications II
- Modeling Bounds on Migration Overhead for a Traveling
Thread Architecture: Patrick La Fratta (University of Notre Dame, USA);
Peter Kogge (University of Notre Dame, USA)
- TiNy Threads on BlueGene/P: Exploring Many-Core Parallelisms
Beyond The Traditional OS: Handong Ye (University of Delaware, USA);
Robert S Pavel (University of Delaware, USA); Aaron Landwehr (University
of Delaware, USA); Guang Gao (Univ. of Delaware, USA)
- Experimental Comparison of Emulated Lock-free vs. Fine-grain
Locked Data Structures on the Cray XMT: Rob Farber (Pacific Northwest
Laboratory, USA); David W. Mizell (Cray, USA)
- Large Scale Complex Network Analysis using the Hybrid
Combination of a MapReduce cluster and a Highly Multithreaded System:
Seunghwa Kang (Georgia Institute of Technology, USA); David A. Bader
(Georgia Institute of Technology, USA)
15:00 - 15:30 : Break II
15:30 - 17:00 : Programming
Framework
- Out-of-Core Distribution Sort in the FG Programming
Environment: Priya Natarajan (Dartmouth College, USA); Thomas H. Cormen
(Dartmouth College, USA); Elena Riccio Strange (A9.com, USA)
- Massive Streaming Data Analytics: A Case Study with
Clustering Coefficients: David Ediger (Georgia Institute of Technology,
USA); Karl Jiang (Georgia Institute of Technology, USA); Jason Riedy
(Georgia Institute of Technology, USA); David A. Bader (Georgia Institute
of Technology, USA)
- Hashing Strategies for the Cray XMT: Eric Goodman
(Sandia National Laboratories, USA); David J Haglin (Pacific Northwest
National Laboratory, USA); Chad Scherrer (Pacific Northwest National
Laboratory, USA); Daniel Gerardo Chavarria (Pacific Northwest National
Laboratory, USA); Jace Mogill (Pacific Northwest National Laboratory,
USA); John Feo (Pacific Northwest National Laboratory, USA)
17:00 : Adjourn
Workshop Organization
Chairs
-
Luiz DeRose (Cray) (ldr@cray.com)
-
Jeffrey Vetter (ORNL and Georgia Tech) (vetter@computer.org)
Program Committee
-
David Bader (Georgia Tech)
-
Jonathan Berry (Sandia National Laboratory)
-
Daniel Chavarria (Pacific Northwest National Laboratory)
-
John Feo (Pacific Northwest National Laboratory)
-
Guang Gao (U. Delaware)
-
Bruce Hendrickson (Sandia National Laboratory)
-
Larry Kaplan (Cray)
-
Peter Kogge (Notre Dame)
-
Michael Merrill (DoD)
-
Jose Moreira (IBM)
-
P. Sadyappan (Ohio State)
-
Mateo Valero (Universitat Politecnica de Catalunya)
-
Hans Zima (NASA Jet Propulsion Laboratory)
Proceedings
The proceedings of this workshop
will be published together with the proceedings of other IPDPS 2010
workshops by the IEEE Computer Society Press.
Workshop Archive
Information and papers from the 2009 MTAAP workshop is
available at http://www.cs.umd.edu/~als/MTAAP09/MTAAP09.html.
Call for Papers
Paper Submission Guidelines
UPDATED TO CONFORM W/ IPDPS GUIDELINES: Submitted
manuscripts may not exceed 15 single-spaced pages using 12-point size font on
8.5x11 inch pages, including figures, tables, and references. Please use the
standard 1-inch margin. Authors may submit additional material as an appendix
to their submission, but there is no guarantee that this material will
influence the review process.
Submitted manuscripts may not exceed
20 single-spaced pages using a 12-point font on standard 8.5 by 11-inch pages,
everything included (figures, tables, references, etc.).
Manuscripts must be submitted electronically and in either
PostScript or PDF format. Submissions will be judged on correctness,
originality, technical strength, significance, quality of presentation, and
interest and relevance to the workshop attendees. Submitted papers may not have
appeared in or be under consideration for another workshop, conference, or
journal.
MTAAP submissions are being handled by EDAS system. To submit a paper, please use the
following link (MTAAP EDAS) and follow the
instructions.
Important Dates
-
Papers due: 13 Dec 2009;
extended to 20 Dec 2009
-
Notification of acceptance: 11 Jan 2010
-
Camera-ready due: 1 Feb 2010
Additional Information
E-mail Contact
For more information on MTAAP 2010 or if you have any
questions please contact the workshop chairs (e-mail addresses listed above).
This website is hosted by the ORNL Future Technologies Group.