MTAAP 2011
Workshop
on Multithreaded Architectures and Applications
May 20, 2011
Anchorage, Alaska USA
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To be held in conjunction with the |
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Multithreading
(MT) programming and execution models, as well as hybrid programming with
accelerated architectures, are starting to permeate the high-end and mainstream
computing scene. This trend is driven by the need to increase processor
utilization and deal with the memory-processor speed gap. Recent and upcoming
examples architectures that fit this profile are Cray's XMT, IBM Cyclops, and
several SMT processors from Sun (Victoria Falls), IBM (Power6, Power7), or
Intel, as well as heterogeneous systems with accelerators such as GPGPUs from
ATI, NVIDIA, and Intel. The underlying rationale to increase processor
utilization is a varying mix of new metrics that take performance improvements
as well as better power and cost budgeting into account. Yet, it remains a
challenge to identify and productively program applications for these
architectures with a resulting substantial performance improvement.
The MTAAP 2011 workshop is a full-day meeting to be held at the IPDPS 2011
focusing on Multithreading architectures and applications. This workshop
intends to identify applications that are amenable to MT and the MT programming
and execution models as well as the underlying architectures on which they can
thrive. The workshop seeks to explore programming frameworks in the form of
languages and libraries, compilers, analysis and debugging tools to increase
the programming productivity. Topics of interest, of both theoretical and
practical significance, include but are not limited to:
The MTAAP workshop proceedings will
be published along with the IPDPS proceedings.
Hardware Transactional Memory for High-Performance
Computing Applications
Karl Ljungkvist (Uppsala
University, Sweden); Martin Tillenius (Uppsala
University, Sweden); David Black-Schaffer (Uppsala University, Sweden); Sverker Holmgren (Uppsala University, Sweden); Martin Karlsson (Uppsala University, Sweden); Elisabeth Larsson
(Uppsala University, Sweden)
A micro threading based concurrency model for parallel
computing
Qiang Yang (University of
Amsterdam, The Netherlands); Chris Jesshope
(University of Amsterdam, The Netherlands); Jian Fu
(University of Amsterdam, The Netherlands)
Comparison of Parallel Programming Models for Multicore
Architectures
Deepak Shehar T. C (Samsung India
Software Operations Pvt Ltd, India); Kiran Varaganti (Samsung India
Software Operations Pvt. Ltd, India); Rahul Suresh (Samsung India Software
Operations Pvt Ltd, India); Rahul Garg
(Samsung India Software Operations Pvt Ltd, India); Ramalingam Ramamoorthy (Samsung
India Software Operations Pvt Ltd, India)
A Work-stealing Framework for mixed-mode parallel
Applications
Martin Wimmer (University of
Vienna, Austria); Jesper Larsson Traff
(University of Vienna, Austria)
Tracking Structure of Streaming Social Networks
David Ediger (Georgia Institute of
Technology, USA); Jason Riedy (Georgia Institute of
Technology, USA); David A. Bader (Georgia Institute of Technology, USA);
Henning Meyerhenke (Georgia Institute of Technology,
USA)
Toward Parallel Document Clustering
Jace Mogill
(Pacific Northwest National Laboratory, USA); David J Haglin
(Pacific Northwest National Laboratory, USA)
Evaluating In-Clique and Topological Parallelism
Strategies for Junction Tree-Based Bayesian Inference Algorithm on the Cray XMT
George Chin (Pacific Northwest National Laboratory, USA); Sutanay Choudhury (Pacific
Northwest National Laboratory, USA); Lars Kangas
(Pacific Northwest National Laboratory, USA); Sally McFarlane (Pacific
Northwest National Laboratory, USA); Andres Marquez (Pacific Northwest National
Laboratory, USA)
High Performance Data Mining Using R on Heterogeneous
Platforms
Prabhat Kumar (Northwestern
University, USA); Berkin Ozisikyilmaz
(Northwestern University, USA); Wei-keng Liao
(Northwestern University, USA); Gokhan Memik (Northwestern University, USA); Alok Choudhary (Northwestern
University, USA)
Bandwidth Reduction Through
Multithreaded Compression of Seismic Images
Ahmed Aqrawi (Norwegian University
of Science and Technology, Norway); Anne C. Elster
(Norwegian University of Science and Technology, Norway)
An Efficient k-means Algorithm on CUDA
Jiadong Wu (Georgia Institute of Technology, USA); Bo Hong (Georgia Institute of Technology, USA)
Submitted
manuscripts may not exceed 15 single-spaced pages using 12-point size font on
8.5x11 inch pages, including figures, tables, and references. Please use the
standard 1-inch margin. Authors may submit additional material as an appendix
to their submission, but there is no guarantee that this material will
influence the review process. Manuscripts must be submitted electronically and
in PDF format. Submissions will be judged on correctness, originality,
technical strength, significance, quality of
presentation, and interest and relevance to the workshop attendees. Submitted
papers may not have appeared in or be under consideration for another workshop,
conference, or journal.
Accepted papers will have a page limit of 10
pages, and authors can purchase an additional 2 pages, for a total of 12 pages
maximum.
MTAAP submissions are being handled by EDAS
system. To submit a paper, please use the following link (MTAAP EDAS) and follow the
instructions.
The
proceedings of this workshop will be published together with the proceedings of
other IPDPS 2010 workshops by the IEEE Computer Society Press. Accepted papers
will have a page limit of 10 pages, and authors can purchase an additional 2
pages, for a total of 12 pages maximum.
Information
and papers from the earlier MTAAP workshops are available:
For
more information on MTAAP or if you have any questions please contact the
workshop chairs (e-mail addresses listed above).
http://ft.ornl.gov/events/mtaap11/
This website is hosted by the ORNL Future Technologies Group.