Exploring Multiple Levels Of Performance Modeling For Heterogeneous Systems

Colloq: Speaker: 
Vivek K. Pallipuram
Colloq: Speaker Institution: 
Clemson University
Colloq: Date and Time: 
Fri, 2013-04-12 10:00
Colloq: Location: 
Building 5100, Room 262
Colloq: Host: 
Jeff Vetter
Colloq: Host Email: 
vetter@ornl.gov
Colloq: Abstract: 
One of the major challenges faced by the High-Performance Computing (HPC) community today is user-friendly and accurate heterogeneous performance modeling. Although performance prediction models exist to fine-tune applications, they are seldom easy-to-use and do not address multiple levels of design space abstraction. Our research aims to bridge the gap between reliable performance model selection and user-friendly analysis. We propose a straightforward and accurate multi-level performance modeling suite for multi-GPGPU systems that addresses multiple levels of design space abstraction. The multi-level performance modeling suite primarily targets synchronous iterative algorithms (SIAs) using our synchronous iterative GPGPU execution (SIGE) model and addresses two levels of design space abstraction: 1) low-level where partial details of the implementation are present along with system specifications and 2) high-level where implementation details are minimum and only high-level system specifications are known. The low-level abstraction of the modeling suite employs statistical techniques for runtime prediction, whereas the high-level abstraction utilizes existing analytical and quantitative modeling tools to predict the application runtime. Our initial validation efforts for the low-level abstraction yield high runtime prediction accuracy with less than 10% error rate for several tested GPGPU cluster configurations and case studies. The development of high-level abstraction models is underway. The end goal of our research is to offer the scientific community, a reliable and user-friendly performance prediction framework that allows them to optimally select a performance prediction strategy for the given design goals and system architecture characteristics.
Colloq: Speaker Bio: 
Vivek Pallipuram is a PhD candidate at Clemson University.