|Title||EqualWrites: Reducing Intra-set Write Variations for Enhancing Lifetime of Non-volatile Caches|
|Publication Type||Journal Article|
|Year of Publication||2016|
|Authors||Mittal, Sparsh, and Vetter Jeffrey S.|
|Journal||IEEE Transactions on VLSI Systems|
|Keywords||cache memory, device lifetime, intra-set write variation, Non-volatile memory (NVM or NVRAM), wear-leveling|
Driven by the trends of increasing core-count and bandwidth-wall problem, the size of last level caches (LLCs) has greatly increased and hence, the researchers have explored non-volatile memories (NVMs) which provide high density and consume low-leakage power. Since NVMs have low write-endurance and the existing cache management policies are write variation-unaware, effective wear-leveling techniques are required for achieving reasonable cache lifetimes using NVMs. We present EqualWrites, a technique for mitigating intra-set write variation. Our technique works by recording the number of writes on a block and changing the cache-block location of a hot data-item to redirect the future writes to a cold block to achieve wear-leveling. Simulation experiments have been performed using an x86-64 simulator and benchmarks from SPEC06 and HPC (high-performance computing) field. The results show that for single, dual and quad-core system configurations, EqualWrites improves cache lifetime by 6.31X, 8.74X and 10.54X, respectively. Also, its implementation overhead is very small and it provides larger improvement in lifetime than three other intra-set wear-leveling techniques and a cache replacement policy.