A Survey of Techniques for Modeling and Improving Reliability of Computing Systems

TitleA Survey of Techniques for Modeling and Improving Reliability of Computing Systems
Publication TypeJournal Article
Year of Publication2016
AuthorsMittal, Sparsh, and Vetter Jeffrey
JournalIEEE Transactions on Parallel and Distributed Systems (TPDS)
Volume27
Issue4
Pagination1226-- 1238
Keywordsarchitectural techniques, classification, fault-tolerance, reliability, Resilience, Review, soft/transient error, vulnerability
Abstract

Recent trends of aggressive technology scaling have greatly exacerbated the occurrences and impact of faults in computing systems. This has made "reliability" a first-order design constraint. To address the challenges of reliability, several techniques have been proposed. This paper provides a survey of architectural techniques for improving resilience of computing systems. We especially focus on techniques proposed for microarchitectural components, such as processor registers, functional units, cache and main memory etc. In addition, we discuss techniques proposed for non-volatile memory (NVM), GPUs and 3D-stacked processors. To underscore the similarities and differences of the techniques, we classify them based on their key characteristics. We also review the metrics proposed to quantify vulnerability of processor structures. We believe that this survey will help researchers, system-architects and processor designers in gaining insights into the techniques for improving reliability of computing systems.

URLhttp://goo.gl/2dtMtM
DOI10.1109/TPDS.2015.2426179