A Survey Of Architectural Techniques for Managing Process Variation

TitleA Survey Of Architectural Techniques for Managing Process Variation
Publication TypeJournal Article
Year of Publication2016
AuthorsMittal, Sparsh
JournalACM Computing Surveys
Keywordscache, CPU, GPU, main memory, process variation, processor core, Review, survey
Abstract

Process variation –deviation in parameters from their nominal specifications– threatens to slow down and even pause technological scaling and mitigation of it is the way to continue the benefits of chip miniaturization. In this paper, we present a survey of architectural techniques for managing process variation (PV) in modern processors. We also classify these techniques based on several important parameters to bring out their similarities and differences. The aim of this paper is to provide insights to the researchers into the state-of-art in PV management techniques and motivate them to further improve these techniques for designing PV resilient processors of tomorrow.

URLhttps://goo.gl/9cYAro
DOI10.1145/2871167
Refereed DesignationRefereed