Future Technologies Colloquium Series

All presentations will occur at ORNL in the Bldg 5100 Auditorium unless otherwise noted. Call us at the number listed on our home page if you have any trouble finding the location.

Date/Time
Speaker
Title
2008-04-28  
Pete Wyckoff  
Ohio Supercomputer Center
Object-Based Storage Devices in Parallel File Systems
2008-04-14  
Richard Vuduc  
Computational Science and Engineering Division, Georgia Tech
Multicore Optimizations for Sparse Matrix Kernels
2008-04-11  
Michael McCracken  
UCSD Department of Computer Science and Engineering
Modeling Time to Solution in High Performance Computing
2008-03-24  
Wei Huang  
The Ohio State University
High Performance Computing with Virtual Machines
2008-03-17  
Kamesh Madduri  
Georgia Institute of Technology
High Performance Computing for Massive Data Analysis
2008-03-06  
Chuanpeng Li  
University of Rochester
Improving Operating System Support for Concurrent I/O
2008-02-15  
Amith R. Mamidala  
The Ohio State University
Bridging MPI-level Collective Primitives and Network/System Capabilities: A Case Study with Modern InfiniBand Multicore Clusters
2008-02-01  
Derek Chiou  
University of Texas, Austin
Parallelized Computer System Simulators
2008-01-25  
Christoph Geile  
Jülich Supercomputing Centre
A Scalable Method for Identifying and Displaying the Communication Behavior of Large Scale Applications
2008-01-17  
Allan Snavely  
San Diego Supercomputer Center, University of California at San Diego
Performance Modeling: Understanding the Past and Predicting the Future in HPC
2007-11-30  
William I. Lundgren  
President and CEO, Gedae, Inc.
The Gedae Programming Language and Compiler for MIMD Programming of Multicores and Multiprocessors
2007-11-08  
Dimitris Nikolopoulos  
Department of Computer Science, Virginia Tech
System Software for Scaling on Many Cores
2007-10-26  
Vivek Sarkar  
Rice University
Programming Challenges for Petascale and Multicore Parallel Systems
2007-10-18  
Daniel Becker  
Jülich Supercomputing Centre Forschungszentrum Jülich GmbH Jülich, Germany
Timestamp Synchronization for Event Traces of Large-Scale Message-Passing Applications
2007-10-11  
Heike Jagode  
TU Dresden Center for Information Services and High Performance Computing (ZIH) Dresden, Germany
Task Placement of Parallel FFTs on a Mesh Communication Network
2007-09-18  
Barton P. Miller  
Computer Sciences Department University of Wisconsin
Scalable Tool Design for Large-Scale Applications
2007-09-13  
Geordie Rose  
Chief Technology Officer, D-Wave Systems Inc.
Using Superconducting Quantum Computers to Solve Artificial Intelligence Problems: Preliminary Results
2007-09-10  
Karen L. Karavanic  
Department of Computer Science High Performance Computing Laboratory PortlandState University Portland, OR
Environment Aware Performance Diagnosis for Petascale Applications
2007-07-26  
Song Jiang  
Department of Electrical and Computer Engineering Wayne State University Detroit, MI
Supporting High Performance I/O with Effective Caching and Prefetching
2007-05-16  
Mike Heroux  
Numerical and Applied Mathematics Department Sandia National Laboratories
Using Trilinos Solvers
2007-05-10  
Sayantan Sur  
Department of Computer Science and Engineering The Ohio State University
Scalable and High-Performance MPI Design for Very Large InfiniBand Clusters
2007-04-20  
Daniel Quinlan  
Center for Applied Scientific Computing Lawrence Livermore National Laboratory
ROSE: Compiler Infrastructure for Custom Software Analysis, Transformation, and Optimization
2007-03-22  
Marcelo Cintra  
School of Informatics The University of Edinburgh Edinburgh, United Kingdom
Alternatives to Eager Hardware Cache Coherence on Large-Scale CMPs
2007-02-16  
Mary Hall  
Information Sciences Institute Computational Sciences Division University of Southern California
A Compiler Strategy for Automatic Performance Tuning of Scientific Applications
2006-12-05  
Dennis Abts  
Cray, Inc.
High-radix Interconnects: Topologies, Routers, and Opportunities for HPC
2006-11-29  
Guang R. Gao  
Endowed Distinguished Professor Dept. of Electrical and Computer Engineering University of Delaware
The Era of Multi/Many-Core Chips - A Fresh Look on Architecture/Software Challenges
2006-10-27  
Jesus Labarta  
Barcelona Supercomputing Center - Centro Nacional de Supercomputing Technical University of Catalonia, Barcelona, Spain, 0801
Programming and Understanding the Cell
2006-10-12  
Brian Wylie  
John von Neumann Institute for Computing (NIC) Forschungszentrum Jülich GmbH, D-52425 Jülich, Germany
Scalable Performance Analysis of Large-Scale Parallel Applications
2006-09-19  
Ahmad Faraj  
Computer Science Department Florida State University
Automatic Empirical Techniques for Developing Efficient MPI Collective Communication Routines
2006-09-18  
Ganesh Bikshandi  
Computer Science Department University of Illinois at Urbana
Hierarchically Tiled Arrays: A Programming Paradigm for Parallelism and Locality
2006-08-31  
Prasanna Sundararajan  
Xilinx Research Labs, San Jose, CA
CHiMPS: Compiling High-Level Languages to Massively Pipelined Systems
2006-08-28  
Jaidev Patwardhan  
Department of Computer Science, Duke University
Architectures for Nanoscale Devices
2006-07-17  
Mike Houston  
http://graphics.stanford.edu/~mhouston/
Programming the Memory Hierarchy
2006-07-14  
John Mellor-Crummey  
Department of Computer Science, Rice University
Co-array Fortran: An emerging language for parallel programming
2006-06-01  
Henry Newman  
Instrumental Inc, Bloomington, MN
I/O Challenges and Issues for HPCS Class Systems: Issues impacting applications, system administrators and architects
2006-05-24  
Dorian Arnold  
University of Wisconsin, Madison
TBONs: Tree-based Overlay Networks for Scalable Tools and Applications
2006-04-18  
Piotr Luszczek  
University of Tennessee, Knoxville
HPC Challenge Benchmark Suite: The Past and the 2006 Edition
2006-03-20  
Jon Berry  
Sandia National Laboratories, *Joint work with Bruce Hendrickson
High Productivity & High Performance Graph Algorithms on Massively Multithreaded Supercomputers*
2006-02-23  
Stefan Mohl  
Co-Founder & CTO of Mitrionics, Lund, Sweden
Fast, Flexible and Effortless Programming of FPGAs
2006-02-20  
Weikuan Yu  
The Ohio State University, Computer Science and Engineering Department
Enhancing MPI and MPI-IO with Modern Networking Mechanisms in Cluster Interconnects
2005-12-07  
Jeff Hollingsworth  
University of Maryland, Department of Computer Science Department
Active Harmony: Towards Automated Performance Tuning
2005-12-06  
Richard Murphy  
University of Notre Dame, Department of Computer Science and Engineering
Traveling Threads: A New Multi-Threaded Execution Model
2005-11-29  
John Feo  
Cray, Inc.
Cray Eldorado - Hardware and Performance
2005-11-09  
Patrick Geoffray  
Myricom, Inc.
Myri-10G: Myrinet converges with Ethernet
2005-10-28  
Han Gao  
University of Chicago, Department of Computer Science
Network Services: The Future of Advanced Collaborative Environments
2005-10-24  
Michael Voss  
University of Toronto, Department of Electrical and Computer Engineering
Leveraging Simultaneous Multithreading to Improve the Performance of OpenMP Applications
2005-09-19  
David A. Bader  
College of Computing, Georgia Institute of Technology
High-Performance Computing for Large-Scale Graph Problems and Computational Biology
2005-08-18  
Laxmikant Kale  
Dept. of Computer Science, University of Illinois at Urbana-Champaign
Adaptive MPI: Intelligent runtime strategies and performance prediction via simulation
2005-08-05  
Jeremy Meredith  
Lawrence Livermore National Laboratory
Graphics Processing Units for General Purpose Computation
2005-07-08  
Patrick Widener  
College of Computing, Georgia Institute of Technology
Dynamic Differential Data Protection in High-Performance Middleware
2005-06-01  
Dr. Ron Sass  
Information and Telecommunication Technology Center (ITTC), University of Kansas
RC-BLAST: Towards an Open Source, Portable FPGA-based Implementation of BLAST
2005-05-13  
Mustafa Tikir  
University of Maryland, College Park, MD
Using Hardware Counters to Automatically Improve Memory Performance
2005-05-10  
Brad Chamberlain  
Cray, Inc., Seattle, WA
An introduction to Chapel: Cray Cascade's High Productivity Language
2005-05-05  
Kalyan Perumalla  
Georgia Tech, Atlanta, GA
Computational Tools for Efficient Large-scale Discrete Event Models
2005-04-14  
Melissa Smith  
Engineering Science & Technology Division, ORNL
Computing Beyond CPUs: Customizable Path to Performance with Reconfigurable Computing Systems
2005-03-18  
Prof. Dhabaleswar K. (DK) Panda  
The Ohio State University
Designing Next Generation High Performance Clusters and Datacenters with InfiniBand
2005-03-16  
Micah Beck  
Department of Computer Science, Director, Logistical Computing and Internetworking Lab, The University of Tennessee
Transcending the Internet
2005-03-15  
Olaf O. Storaasli  
Sr Research Scientist, NASA Langley,
Engineering Applications on NASA's FPGA-based Hypercomputer
2005-03-08  
Prof. Allen D. Malony  
Performance Research Laboratory, Department of Computer and Information Science, University of Oregon
Performance Technology for Productive, High-End Parallel Computing
2005-02-10  
Scott Atchley  
University of Tennessee, Knoxville, Department of Computer Science
Logistical Networking in Distributed High Performance Computing
2004-10-06  
Felix Wolf  
University of Tennessee, Knoxville
Automatic Performance Analysis of Parallel Applications with KOJAK
2004-09-20  
George F. Riley  
Georgia Tech
The Georgia Tech Network Simulator
2004-09-03  
I-Hsing Chung  
University of Maryland
Towards Automatic Performance Tuning
2004-07-21  
Luiz DeRose  
Cray Inc.
Cray Performance Tools: Current Status and Future Directions
2004-06-17 Cray J. Henry
DoD High Performance Computing Modernization Program (HPCMP)
An Overview of the DoD High Performance Computing Modernization Program

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