High-radix Interconnects: Topologies, Routers, and Opportunities for HPC
December 5, 2006
02:00 PM
ORNL, Bldg. 5600, Room C212A
Host: Jeffrey Vetter
(vetter@ornl.gov
)
ABSTRACT:
This talk describes
the radix-64 folded-Clos network of the Cray BlackWidow scalable vector
multiprocessor. We describe the BlackWidow network which scales
to 32K processors with a worst-case diameter of seven hops, and the
underlying high-radix router microarchitecture and its implementation.
By using a high-radix router with many narrow channels we are
able to take advantage of the higher pin density and faster signaling
rates available in modern ASIC technology. The BlackWidow router is an
800 MHz ASIC with 64 18.75Gb/s bidirectional ports for an aggregate
off-chip bandwidth of 2.4Tb/s. Each port consists of three 6.25Gb/s
differential signals in each direction. The router supports
deterministic and adaptive packet routing with separate buffering for
request and reply virtual channels. The router is organized
hierarchically as an 8x8 array of tiles which simplifies arbitration by
avoiding long wires in the arbiters. Each tile of the array contains a
router port, its associated buffering, and an 8x8 router subswitch. We
describe the benefit of adaptive routing in high-radix networks and
explore alternate topologies that can built from high-radix routers.
# # #