Computational Structures and Materials Seminar
Olaf O. Storaasli
Future Technologies Group
Computing and Computational Sciences Directorate
Oak Ridge National Laboratory
January 30, 2006, 11:00 a.m.
Room 310, Building 1247A, NASA Langley
Host: Jonathan.B.Ransom@nasa.gov, 757-864-2907
Abstract
High-Performance Computing (HPC) is undergoing revolutionary changes from its underlying hardware to the software used to solve applications. This talk discusses the myriad of competing hardware architecture options (multi-core, Field Programmable Gate Array(FPGA), Graphics, Cell, Optical and Quantum Processors) offering the potential to speed calculations by orders of magnitude IF applications are coded (in parallel) to harness their potential. Coding such new architecture devices is dominated by specialized, esoteric languages (VHDL, Verilog) far to low-level for most high-level HPC applications developers. ORNL is exploring approaches to bridging this gap and solving this significant software challenge. Such a software breakthrough is key to reaping the significant performance gains enabling the solution of grand-challenge applications, never before attempted.
Dr. Olaf O. Storaasli recently joined the Future Technology Group as a Distinguished Research Scientist at Oak Ridge National Laboratory after his career as a NASA Senior researcher developing algorithms and architectures for High-Performance computers (including advanced architectures based on FPGAs). Dr. Storaasli earned his PhD in Engineering Mechanics from North Carolina State University and has served on the Adjunct Graduate faculty of George Washington University and Christopher Newport University. (Google: Olaf ORNL for more info)