Jeffrey Vetter	Organization	Group Leader Future Technologies Group Computer Science and Mathematics Division Oak Ridge National Laboratory	Joint Professor School of Computational Science and Engineering College of Computing Georgia Institute of Technology
	Mailing Address	One Bethel Valley Road Bldg 5100, MS-6173 Oak Ridge, TN 37831-6173	Klaus Advanced Computing Building 266 Ferst Drive, #1120C Atlanta, GA 30332-0765
	Office	Bldg 5100, Room 233	Klaus 1120C
	Phone	+1 865-356-1649	+1 865-356-1649
	Fax	+1 865-241-4008	+1 865-241-4008
	Email	vetter@computer.org	vetter@computer.org
	URL	http://ft.ornl.gov/~vetter	http://www.cc.gatech.edu/~vetter
	Visitor Info	Map Visitor information (including lodging) Directions to FT offices	Map Visitor information (including lodging) Maps and Directions to Georgia Tech

Bio

Jeffrey Vetter, Ph.D., has a joint appointment between Oak Ridge National Laboratory (ORNL) and the Georgia Institute of Technology (GT). At ORNL, Vetter is a Distinguished R&D Staff Member, and the founding group leader of the Future Technologies Group in the Computer Science and Mathematics Division. At GT, Vetter is a Joint Professor in the Computational Science and Engineering School of the College of Computing, the Principal Investigator for the NSF Track 2D Experimental Computing XSEDE Facility, named Keeneland (also see the Keeneland XSEDE Portal), for large scale heterogeneous computing using graphics processors, and the Director of the NVIDIA CUDA Center of Excellence.

Vetter earned his Ph.D. in Computer Science from the Georgia Institute of Technology. He joined ORNL in 2003, after stints as a computer scientist and project leader at Lawrence Livermore National Laboratory, and postdoctoral researcher at the University of Illinois at Urbana-Champaign. The coherent thread through his research is developing rich architectures and software systems that solve important, real-world high performance computing problems. Currently, Vetter's research addresses problems in analyzing new architectures for HPC using measurement, modeling, and simulation. In particular, he has been investigating the effectiveness of next-generation architectures, such as graphics processors, massively multithreaded processors, non-volatile memory systems, heterogeneous multicore processors, and field-programmable gate arrays (FPGAs), for key applications.

Vetter is a Senior Member of the IEEE, and a Distinguished Scientist Member of the ACM. His papers have won awards at the International Parallel and Distributed Processing Symposium (IPDPS) and EuroPar, and Vetter, as part of an interdisciplinary team from Georgia Tech, NYU, and ORNL, was awarded the Gordon Bell Prize in 2010.

Publications and Recent Presentations

See our Future Tech Publications page for group publications.
My new book titled "Contemporary High Performance Computing: From Petascale toward Exascale."

Publisher site

Electronic version of both full book and individual chapters

Amazon

Recent Presentations

"Automated Exploration of the HPC Codesign Space with Aspen." 1st International Workshop on Strategic Development of High Performance Computers, 2013, Tsukuba, http://www.open-supercomputer.org/workshop/iwsdhpc/iwsdhpc-1/