Architectural Support for Overseeing Memory in Multiprocessors
Submitted by rothpc on Tue, 2012-03-20 15:57
Colloq: Speaker Institution:
University of Rochester
Colloq: Date and Time:
Thu, 2010-06-03 10:00
Building 5100, Room 128
Colloq: Host Email:
Developing correct, high performance, and reliable software remains a growing challenge. Algorithms, languages, and operating systems have all been forced to adopt parallelism due to the increasing prevalence of multicores, which increases the likelihood of concurrency bugs. In this talk, I will describe my efforts to support controlled memory sharing through hardware mechanisms for memory monitoring (observing and summarizing accesses), isolation (controlling dissemination of modifications), and protection (controlling access privileges).First, I will focus on transactional memory, an important concurrency construct that promises to make parallel programming easier. I will coordinate the monitoring and isolation mechanisms and develop FlexTM,a flexible, software-controlled high-performance TM. I will then Sentry, a hardware framework that enforces protected sharing across modules in an application with the goal of improving reliability. I will conclude with my future plans for developing oversight mechanisms to enable software to use hardware resources more efficiently.
Colloq: Speaker Bio:
Arrvindh Shriraman is a graduate student in computer science at the University of Rochester and is supervised by Sandhya Dwarkadas. Arrvindh's research interests lie at the interface of hardware and software and include multiprocessor system design and parallel programming models. His research seeks to propose hardware aids to help programmers write more robust and scalable software.