A Survey Of Techniques for Architecting and Managing Asymmetric Multicore Processors
|Title||A Survey Of Techniques for Architecting and Managing Asymmetric Multicore Processors|
|Publication Type||Journal Article|
|Year of Publication||2016|
|Journal||ACM Computing Surveys|
|Keywords||asymmetric multicore processor (AMP), big/little system, classification, heterogeneous multicore architecture, reconfigurable AMP, Review, survey|
To meet the needs of diverse range of workloads, asymmetric multicore processors (AMPs) have been proposed, which feature cores of different microarchitecture or ISAs. However, given the diversity inherent in their design and application scenarios, several challenges need to be addressed to effectively architect AMPs and leverage their potential in optimizing both sequential and parallel performance. Several recent techniques address these challenges. In this paper, we present a survey of architectural and system-level techniques proposed for designing and managing AMPs. By classifying the techniques on several key characteristics, we underscore their similarities and differences. We clarify the terminology used in this research field and identify challenges that are worthy of future investigation. We hope that more than just synthesizing the existing work on AMPs, the contribution of this survey will be to spark novel ideas for architecting future AMPs that can make a definite impact on the landscape of next-generation computing systems.