FTG's Vetter named IEEE Fellow

The IEEE Board of Directors has named Jeffrey Vetter an IEEE Fellow. Vetter is a researcher at the Department of Energy’s Oak Ridge National Laboratory (ORNL) and was recognized for his accomplishments in computational science, specifically “for contributions to high performance computing.” Vetter is a distinguished R&D staff member at ORNL and is also the founding group leader of the Future Technologies Group in the Computer Science and Mathematics Division of ORNL.

[see hpcwire post]



ORNL plays key role in Exascale Computing Project’s first year

Oak Ridge National Laboratory experts are playing leading roles in the recently established Department of Energy’s (DOE’s) Exascale Computing Project (ECP), a multi-lab initiative responsible for developing the strategy, aligning the resources, and conducting the R&D necessary to achieve the nation’s imperative of delivering exascale computing by 2021.


FTG's Seyong Lee wins IEEE CS TCHPC Award for Excellence for Early Career Researchers in HPC

FTG's Seyong Lee won the 2016 IEEE CS TCHPC Award for Excellence for Early Career Researchers in High Performance Computing: “In recognition of outstanding contributions in the field of high performance computing within 5 years of receiving a PhD degree." Recipients of the 2016 IEEE CS TCHPC Award for Excellence for Early Career Researchers in High Performance Computing will receive an award at SC16 on Thursday, Nov 17. 

See the announcment for IEEE CS at 


ORNL Creates a Programming System for Non-Volatile Main Memory Systems

4 Oct 2016  – Non-volatile memory (NVM) is playing a more important role in the memory architectures of HPC systems as illustrated by recent deployments and procurements. Yet there exist neither standard language constructs nor portable programming systems that provide support for these types of emerging memory architectures.

ORNL Develops an OpenACC-to-FPGA Translation Framework for High-Performance Reconfigurable Computing

13 May 2016 – A new paper entitled, "OpenACC to FPGA: A Framework for Directive-based High-Performance Reconfigurable Computing" describes how the Future Technologies Group at Oak Ridge National Laboratory (ORNL) is attacking the well-known programmability and performance portability challenges of Field Programmable Gate Arrays (FPGAs). The researchers have extended the standard, portable OpenACC specification for FPGAs and evaluated it with a prototype implementation, demonstrating that OpenACC programs can be directly compiled for FPGAs.

New FTG paper surveys approximate computing techniques

 A new FTG paper presents a survey of approximate computing techniques and has been highlighted on InsideHPC. Published in ACM Computing Surveys 2016, A Survey Of Techniques for Approximate Computing reviews nearly 85 papers on approximate computing in CPU, GPU and FPGA and various processor components (e.g. cache, main memory), along with approximate storage in SRAM, DRAM/eDRAM and non-volatile memories, e.g.